Computer Organization & Architecture

Designing for Performance

  • Nombre de pages : 836 pages   drapeau anglais
  • Date de parution : 25/11/2002 (6e édition)

Résumé

William Stalling's book provides comprehensive and completely up-to-date coverage of computer organization and architecture including memory, I/O, and parallel systems. The text covers leading-edge areas, including superscalar design, IA-64 design features, and parallel processor organization trends. It meets students' needs by addressing both the fundamental principles as well as the critical role of performance in driving computer design. Providing an unparalleled degree of instructor and student support, including supplements and online resources through the book's website, the sixth edition is in the forefront in its field.

New
  • IA-64/ltanium architecture: chapter-length description and analysis that includes predicated execution and speculative loading.
  • Cache memory: Cache memory is a central element in the design of high-performance processors. An entire chapter is devoted to this issue in the new edition.
  • Optical memory: expanded and updated.
  • Advanced DRAM architecture: more material has been added to cover this topic, including an updated discussion of SDRAM and RDRAM.
  • SMP's, clusters, and NUMA systems: the chapter P on parallel organization has been expanded and updated.
  • Expanded instructor support: the book now provides extensive support for projects with its new website.
  • Pedagogy: each chapter now includes a list of review questions (as well as homework problems) and a list of key words.
Distinguishing Key Features
  • Running examples: numerous concrete examples, especially Pentium 4 and Power PC G4.
  • Bus organization: detailed treatment and evaluation of key design issues.
  • RISC: broad, unified presentation.
  • Microprogrammed implementation: full treatment for a firm grasp.
  • I/O functions and structures: provides full understanding and shows interaction of I/O modules with the outside world and the CPU.
  • Unified instructional approach: enables student to evaluate instruction set design issues.
  • Instructors Resource CD-ROM: includes solutions to homework problems, list of research projects, list of simulation projects plus student manual for both SimpleScalar and SMPCache, and a list of suggested reading assignments.

Contents

Pt.1 Overview
  • Introduction
  • Computer Evolution and Performance
Pt. 2 The Computer System
  • A Top-Level View of Computer Function and Interconnection
  • Cache Memory
  • Internal Memory
  • External Memory
  • Input/Output
  • Operating System Support
Pt. 3 The Central Processing Unit
  • Computer Arithmetic
  • Instruction Sets: Characteristics and Functions
  • Instruction Sets: Addressing Modes and Formats
  • CPU Structure and Function
  • Reduced Instruction Set Computers
  • Instruction-Level Parallelism and Superscalar Processors
  • The IA-64 Architecture
Pt. 4 The Control Unit
  • Control Unit Operation
  • Microprogrammed Control
Pt. 5 Parallel Organization
  • Parallel Processing
  • App. A Digital Logic
  • App. B Number Systems
  • App. C Projects for Teaching Computer Organization and Architecture

Caractéristiques

  • Type produit : Ouvrage
  • Langue : Anglais
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  • Editeur(s) : Prentice Hall
  • Auteur(s) : William Stallings
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  • EAN13 : 9780130351197
  • ISBN10 : 0-13-035119-9
  • Parution : 25/11/2002
  • Edition : 6e édition
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  • Nb de pages : 836 pages
  • Format : 18,2 x 24
  • Couverture : Relié
  • Poids : 1387 g
  • Intérieur : Noir et Blanc
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