Fault-Tolerance and Reliability Techniques for High-Density Random-Access Memories

• Embedded RAM for SoC design: practical circuit and layout design principles and techniques
• State-of-the-art manufacturing, online, and field-related fault tolerance
• Structured custom design solutions for self-testable/self-repairable embedded RAMs
• Includes extensive illustrations and examples, plus a compendium of 500+ research papers

• Embedded RAM for SoC design: practical circuit and layout design principles and techniques
• New research into the mechanisms underlying soft and hard failures
• Understanding the impact of scaling on reliability
• Modeling and analysis of manufacturing yield
• Manufacturing fault tolerance: built-in self-diagnosis and repair, reconfiguration, repair via EEPROM switches, flexible redundancy, and more
• Techniques for mitigating radiation-induced single-event effects
• Field fault tolerance: error correcting codes and associated circuit techniques
• Structured custom design solutions for self-testable and self-repairable embedded RAMs: circuit and physical design

Contents

• 1. Reliability and Fault Tolerance of Rams.
• Impact of Scaling on Reliability. Defects, Faults, Errors, and Reliability. Reliability and Quality Testing and Measurement. Reliability Characterization. Reliability Prediction Procedures. Reliability Simulation Tools. Mechanisms for Permanent Device Failure. Safeguarding against Failures.

• 2. Diagnosis, Repair, and Reconfiguration.
• Diagnosis Algorithms. Repair Algorithms. Reconfiguration Techniques. Repair Using Flash Eeprom Switches. Flexible Redundancy. Built-In Self-Diagnosis and Self-Repair. Built-In Redundancy Analysis. Built-In Self-Repair Architectures.

• 3. Single-Event Effects and Their Mitigation.
• Particles Causing Single-Event Effects. Some Definitions. Basic Mechanisms for Nondestructive Single-Event Effects. Ram Device Operation. Critical Charge and Soft Error Rate. Techniques Used for Mitigation of Single-Event Upsets. Experiments. Modeling and Simulation of Charge Collection. Basic Mechanisms for Destructive Single-Event Effects.

• 4. Error-Correcting Codes.
• Theory of Error-Correcting Codes. Fault-Tolerant Design Techniques for Rams. Ecc Implementations. Memory Reliability Evaluation through Error Correction. Simulation of Memory Reliability and Fault Tolerance.

• 5. Yield Modeling and Prediction Techniques.
• Yield Models. Yield Loss Mechanisms. Importance of Clustering Models. Critical Area Simulation and Yield Calculation. Effect of Redundancy and Error Correction on Yield. Effect of Defect Density on Yield. Effect of Defect Characteristics on Yield. Effect of Device Scaling on Yield. Relationship between Yield and Reliability.

• 6. Physical Design of Built-In Self-Repairable Rams.
• Embedded Rams. Built-In Self-Repairable Embedded Ram Physical Design. Fault Modeling Based on Inductive Fault Analysis. Circuit Implementation. Characterization of a Custom Design Tool. Multiobjective Optimization Approach for Ram Design. Floorplanning of Parametrized Rectangular Macrocells. Bist/Bisr for Other Types of Memories.