The Science and Engineering of Microelectronic Fabrication
Résumé
- Provides an introduction to microelectronic processing to a wide audience
- Makes use of the process simulation package SUPREM, showing students how to use it to predict impurity profiles of practical interest
Contents
- Preface
- Section I Overview and Materials
- 1 Overview of Semiconductor Fabrication
- 1.1 Introduction
- 1.2 Layered Technologies: A Simple Example
- 1.3 Unit Processes
- 1.4 Technologies Overview
- 1.5 A Roadmap for the Course
- 2 Semiconductor Substrates
- 2.1 Phase Diagrams and Solid Solubility
- 2.2 Crystallography and Crystal Structure
- 2.3 Crystal Defects
- 2.4 Czochralski Growth
- 2.5 Bridgman Growth of GaAs
- 2.6 Float-Zone Growth
- 2.7 Wafer Preparation and Specifications
- 2.8 Summary and Future Trends
- Section II Unit Process I: Hot Processing and Ion Implantation
- 3 Diffusion
- 3.1 Fick's Diffusion Equation in One Dimension
- 3.2 Atomistic Models of Diffusion
- 3.3 Analytic Solutions of Fick's Law
- 3.4 Corrections to the iSimple asdf;
- 3.5 Diffusion Codefficients for Common Dopants
- 3.6 Analysis of Diffused Profiles
- 3.7 Diffusion in SiO2
- 3.8 Diffusion Systems
- 3.9 SUPREM Simulations of Diffusion Profiles
- 3.10 Summary
- 4 Thermal Oxidation
- 4.1 The Deal-Grove Model of Oxidation
- 4.2 The Linear and Parabolic Rate Coefficients
- 4.3 The Initial Oxidiation Regime
- 4.4 The Structure of SiO2
- 4.5 Oxide Characterization
- 4.6 The Effects of Dopants on Oxidation and Polysilicon Oxidatation
- 4.7 Oxidation Induced Stacking Faults
- 4.8 Alternative Thermal Dielectrics
- 4.9 Oxidation Systems
- 4.10 SUPREM III Oxidations
- 4.11 Summary
- 5 Ion Implantation
- 5.1 Idealized Ion Implant Systems
- 5.2 Coulomb Scattering
- 5.3 Vertical Projection Range
- 5.4 Channeling and lteral Projected Range
- 5.5 Implantation Damage
- 5.6 Shallow Junction Formation
- 5.7 Buried Dielectrics
- 5.8 Ion Implant Systems - Problems and Concerns
- 5.9 Implanted Profiles Using SUPREM III
- 5.10 Summary
- 6 Rapid Thermal Processing
- 6.1 Gray Body Radiation, Heat Exchange and Optical Absorption
- 6.2 High Intensity Optical Sources and the Reflecting Cavity
- 6.3 Temperature Measurement
- 6.4 Thermoplastic Stress
- 6.5 Rapid Thermal Activation of Impurities
- 6.6 Rapid Thermal Processing of Dielectrics
- 6.7 Silicidation and Contact Formation
- 6.8 Advanced Systems
- 6.9 Summary
- Section III Unit Processes 2: Pattern Transfer
- 7 Optical Exposure Tools
- 7.1 Lithography Overview
- 7.2 Diffraction
- 7.3 The Modulation Transfer Function and Optical Exposures
- 7.4 Source Systems and Spatial Coherence
- 7.5 Contact/Proximity Printers
- 7.6 Projection Printers
- 7.7 Advanced Mask Concepts
- 7.8 Surface Reflections and Standing Waves
- 7.9 Alignment
- 7.10 Summary
- 8 Photoresists
- 8.1 Photoresist Types
- 8.2 Organic Materials and Polymers
- 8.3 Typical Reactions of DQN Positive Photoresists
- 8.4 Contrast Curves
- 8.5 The Critical Modultaion Transfer Function
- 8.6 Applying and Developing Photoresist
- 8.7 Second Order Exposure Effects
- 8.8 Advanced Photoresists and Photoresist Processes
- 8.9 Summary
- 9 Nonoptical Lithographic Techniques
- 9.1 Interaction of a High Energy Beam With Matter
- 9.2 Electron Beam Lithography Systems
- 9.3 Electron Beam Lithography Summary and Outlook
- 9.4 X-Ray Sources
- 9.5 X-Ray Exposure Systems
- 9.6 X-Ray Masks
- 9.7 Summary and Outlook for X-Ray Lithography
- 9.8 E-Beam and X-Ray Resists
- 9.9 Radiation Damage in MOS Devices
- 9.10 Summary
- 10 Vacuum Science and Plasmas
- 10.1 The Kinetic Theory of Gases
- 10.2 Gas Flow and Conductance
- 10.3 Pressure Ranges and Vacuum Pumps
- 10.4 Vacuum Seals and Pressure Measurement
- 10.5 The DC Glow Discharge
- 10.6 RF Discharge
- 10.7 Magnetically Enhanced and ECR Plasmas
- 10.8 Radiation from Accelerated Charged Particles
- 10.9 Summary
- 11 Etching
- 11.1 Wet Etching
- 11.2 Basic Regimes of Plasma Etching
- 11.3 High Pressure Plasma Etching
- 11.4 Ion Milling
- 11.5 Reactive Ion Etching
- 11.6 Damage in Reactive Ion Etching
- 11.7 Magnetically Enhaned Reactive Ion Etch (MERIE) Systems
- 11.8 Lift Off
- 11.9 Summary
- Section IV Unit Processing 3: Thin Film Deposition and Epitaxial Growth
- 12 Physical Deposition: Evaporation and Sputtering
- 12.1 Phase Diagrams: Sublimation and Evaporation
- 12.2 Deposition Rates
- 12.3 Step Coverage
- 12.4 Evaporator Systems: Crucible Heating Techniques
- 12.5 Multicomponent Films
- 12.6 An Introduction to Sputtering
- 12.7 Physics of Sputtering
- 12.8 Deposition Rate: Ion Yield
- 12.9 Magnetron Sputtering
- 12.10 Morphology and Step Coverage
- 12.11 Sputtering Methods
- 12.12 Sputtering of Specific Materials
- 12.13 Stress in Deposited Layers
- 12.14 Summary
- 13 Chemical Vapor Deposition
- 13.1 Types of Chemical Reactions
- 13.2 Chemical Equilibrium and the Law of Mass Action
- 13.3 Gas Flow and Boundary Layers
- 13.4 CVD Process Requirements
- 13.5 Low Pressure CVD Processes
- 13.6 Plasma Enhanced CVD
- 13.7 Photon Assisted and Laser Induced CVD
- 13.8 Characterization of CVD Dielectrics
- 13.9 Metal CVD
- 13.10 Summary
- 14 Exitaxial Growth
- 14.1 Wafer Cleaning and Native Oxide Removal
- 14.2 The Thermodynamics of Growth
- 14.3 Surface Reactions
- 14.4 Dopant Incorporation
- 14.5 Defects in Epitaxial Growth
- 14.6 Selective Growth
- 14.7 Halide Transport GaAs Vapor Phase Epitaxy
- 14.8 Incommensurate and Strained Layer Heteroepitaxy
- 14.9 Metal Organic Chemical Vapor Deposition (MOCVD)
- 14.10 Advanced Silicon Vapor Phase Epitaxial Growth Techniques
- 14.11 Molecular Beam Epitaxy Technology
- 14.12 BCF Theory
- 14.13 Gas Source MBE and Chemical Beam Epitaxy
- 14.14 Summary
- Section V Process Integration
- 15 Device Isolation, Contacts, and Metalization
- 15.1 Junction and Oxide Isolation
- 15.2 LOCOS Methods
- 15.3 Trench Isolation
- 15.4 Silicon on Insulator Isolation Techniques
- 15.5 Semi-insulation Substrates
- 15.6 Schottky Contacts
- 15.7 Implanted Ohmic Contacts
- 15.8 Alloyed Contacts
- 15.9 Multilevel Metallization
- 15.10 Planarization
- 15.11 Summary
- 16 CMOS Process Flows
- 16.1 Basic Long Channel Device Behavior
- 16.2 Early MOS Technologies
- 16.3 The Basic Three Micron Technology
- 16.4 Device Scaling
- 16.5 Hot Carrier Effects and Drain Engineering
- 16.6 Latchup
- 16.7 Summary
- 17 GaAs FET Technologies
- 17.1 MESFET Device Operation
- 17.2 Basic MESFET Technology
- 17.3 Digital Technologies
- 17.4 MMIC Technologies
- 17.5 MODFETs
- 17.6 Summary
- 18 Silicon Bipolar Techniques
- 18.1 Review of Bipolar Devices - Ideal and Quasi Ideal Behavior
- 18.2 Second Order Effects
- 18.3 Performance of BJT's
- 18.4 Early Bipolar Processes
- 18.5 Advance Bipolar Processes
- 18.6 Hot Electron Effects in Bipolar Transistors
- 18.7 BiCMOS
- 18.8 Analog Bipolar Techniques
- 18.9 Summary
- 19 Integrated Circuit Manufacturing
- 19.1 Yield and Yield Tracking
- 19.2 Particle Control
- 19.3 Statistical Process Control
- 19.4 Full Factorial Experiments and ANOVA
- 19.5 Design of Experiments
- 19.6 Computer Integrated Manufacturing
- 19.7 Summary
- Appendices
- I List of Symbols and Acronyms
- II Properties of Selected Semiconductor Materials
- III Physical Constants
- IV Conversion Factors
- V The Complimentary Error Function
- VI F Values
L'auteur - Stephen A. Campbell
Associate Professor of Electrical Engineering, Department of Electrical Engineering, University of Minnesota
Caractéristiques techniques
PAPIER | |
Éditeur(s) | Oxford University Press |
Auteur(s) | Stephen A. Campbell |
Parution | 01/05/2001 |
Nb. de pages | 603 |
Format | 19,5 x 24 |
Couverture | Relié |
Poids | 1218g |
Intérieur | Noir et Blanc |
EAN13 | 9780195136050 |
ISBN13 | 978-0-19-513605-0 |
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