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High k Gate Dielectrics
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High k Gate Dielectrics

High k Gate Dielectrics

M Houssa - Collection Series in Materials Science and Engineering

601 pages, parution le 06/01/2004

Résumé

The drive towards smaller and smaller electronic componentry has huge implications for the materials currently being used. Conventional materials will be unable to function at scales much smaller than those in current use, as quantum mechanical effects will begin to dominate. For this reason new materials with higher electrical permittivity will be required, and this is a subject of intensive research activity within the microelectronics community.

This book reviews the state-of-the-art in high permittivity gate dielectric research. Consisting of contributions from leading researchers from Europe and the USA, the first chapter describes the various deposition techniques used for construction of layers at these dimensions. The second chapter considers characterization techniques of the physical, chemical, structural and electronic properties of these materials. The third chapter reviews the theoretical work done in the field, and the final section is devoted to technological applications. Top

Readership
Graduate students and researchers in applied physics and electrical and electronic engineering

L'auteur - M Houssa

Editor, University of Provence, France

Sommaire

  • Introduction
  • The need for high-k gate dielectrics and materials requirement
  • Deposition techniques
  • ALCVD, MOCVD, PLD, MBE,
  • Characterization
  • Physico-chemical characterization, X-ray and electron spectroscopies, Oxygen diffusion and thermal stability , Defect characterization by ESR, Band alignment determined by photo-injection , Electrical characteristics Theory
  • Theory of defects in high-k materials, Bonding constraints and defect formation at Si/high-k interfaces, Band alignment calculations, Electron mobility at the Si/high-k interface, Model for defect generation during electrical stress
  • Technological aspects
  • Device integration issues, Device concepts for sub-100 nm CMOS technologies, Transistor characteristics , Non-volatile memories based on high-k ferroelectric layers
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Caractéristiques techniques

  PAPIER
Éditeur(s) Institute of Physics (IOP)
Auteur(s) M Houssa
Collection Series in Materials Science and Engineering
Parution 06/01/2004
Nb. de pages 601
Format 16 x 24
Couverture Relié
Poids 1170g
Intérieur Noir et Blanc
EAN13 9780750309066
ISBN13 978-0-7503-0906-6

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