Introduction to Logic Design

Introduction to Logic Design is intended for a first course in logic design, taken by computer science, computer engineering, and electrical engineering students (most commonly in the sophomore year). Its special strengths are a clear presentation of fundamentals with an exceptional collection of examples, solved problems, and exercises. The text integrates laboratory experiences, both hardware and computer simulation, while not making them mandatory for following the main flow of the chapters. Design is emphasized throughout the text. Switching algebra is developed as a tool for analyzing and implementing digital systems. The book contains an excellent presentation of minimization of combinational circuits, including multiple output ones, using the Karnaugh map and iterated consensus. There are a number of examples of the design of larger systems, both combinational and sequential, using medium scale integrated circuits and programmable logic devices. Introduction to Logic Design will provide students with the sort of grounding that will give them a solid foundation for further study, whether it be in a computer science, computer engineering, or electrical engineering program.

Key features

• A clear and well-paced writing style makes this text especially well-suited for students who might otherwise find this course area particularly challenging.
• An extensive set of examples well integrated into the body of the text as well as at the end of each chapter in sections of solved problems gives students multiple opportunities to understand the topics being presented.
• The text integrates practical circuits with theory by presenting two types of laboratory experiments. Traditional hands-on hardware experiments as well as simulation laboratory exercises using popular software packages are tied closely to the text material to allow students to implement the concepts they are learning.
• Use of the Karnaugh Map helps students understand the principles of switching algebra.
• Coupling of gate implementation with the algebra helps extend the students' range of understanding.
• A thorough discussion of the minimization of switching functions using Karnaugh maps, including 6-variable maps and multiple output problems, gives students something to sink their teeth into and doesn't leave them wondering about the unusual or boundary case.
• An algorithmic minimization approach using iterated consensus helps distinguish the text.
• Design using standard medium scale integrated circuit packages and programmable logic devices is emphasized.
• Complete coverage of the analysis and design of synchronous sequential systems adds to the comprehensive nature of the text.
• The derivation of state tables from word problems further emphasizes the practical implementation of the material being presented.
• State reduction and state assignment using partitions is also included.
• www.mhhe.com/marcovitz--A robust web site complements the text and assists the instructor by featuring Powerpoint slides of most figures and key material, sets of examinations from the course, and alternate parallel examples, so that the instructor can do a different example in class from the one given in the book.
• Also included at web site--Altera's MaxPlusII and Yoeric Win Breadboard demo.

Contents

C1 Introduction

1.1 A Brief Review of Number Systems

1.1.1 Octal and Hexadecimal

1.1.2 Binary Addition

1.1.3 Signed Numbers

1.1.4 Binary Subtraction

1.1.5 Binary Coded Decimal (BCD)

1.2 The Design Process for Combinational Systems

1.3 The Development of Truth Tables

1.4 Don't Care Conditions

1.5 The Laboratory

1.6 Solved Problems

1.7 Exercises

2 Switching Algebra and Logic Circuits

2.1 Definition of Switching Algebra

2.2 Basic Properties of Switching Algebra

2.3 Manipulation of Algebraic Functions

2.4 Implementation of Functions with AND, OR, and NOT Gates

2.5 From the Truth Table to Algebraic Expressions

2.6 Introduction to the Karnaugh Map

2.7 The Complement and Product of Sums

2.8 NANS, NOR, and Exclusive-OR Gates

2.9 Simplification of Algebraic Expressions

2.10 Manipulation of Algebraic Functions and NAND Gate Implementations

2.11 A More General Boolean Algebra

2.12 Solved Problems

2.13 Exercises

3 More Algorithmic Simplification Techniques

3.1 The Karnaugh Map

3.1.1 Minimum Sum of Product Expressions Using the Karnaugh Map

3.1.2 Don't Cares

3.1.3 Product of Sums

3.1.4 Minimum Cost Gate Implementations

3.1.5 Five- and Six-Variable Maps

3.1.6 Multiple Output Problems

3.2 An Algorithmic Minimization Technique

3.2.1 Iterated Consensus for One Output

3.2.2 Prime Implicant Tables for One Output

3.2.3 Iterated Consensus for Multiple Output Problems

3.3 Solved Problems

3.4 Exercises

4 Solving Larger Problems

4.1 Delay in Combinational Logic Circuits

4.2 Adders

4.3 Decoders

4.4 Encoders and Priority Encoders

4.5 Multiplexers

4.6 Three-State Gates

4.7 Gate Arrays- ROMS, PLAs, and PALs

4.7.1 Designing with Read-Only Memories

4.7.2 Designing with Programmable Logic Arrays

4.7.3 Designing with Programmable Array Logic

4.8 Larger Examples

4.8.1 Seven-Segment Displays (First Major Example)

4.8.2 An Error and Decoding System (Second Major Example)

4.9 Solved Problems

4.10 Exercises

5 Sequential Systems

5.1 Latches and Flip Flops

5.2 The Design Process for Synchronous Sequential Systems

5.3 Analysis of Sequential Systems

5.4 Flip Flop Design Techniques

5.5 The Design of Synchronous Counters

5.6 Design of Asynchronous Counters

5.7 Derivation of State Tables and State Diagrams

5.8 Solved Problems

5.9 Exercises

6 Solving Larger Sequential Problems

6.1 Shift Registers

6.2 Counters

6.3 Programmable Logic Devices (PLDs)

6.4 Design Using ASM Diagrams

6.5 Hardware Design Languages

6.6 More Complex Examples

6.7 Solved Problems

6.8 Exercises

7 Simplification of Sequential Systems

7.1 A Tabular Method for State Reduction

7.2 Partitions

7.2.1 Properties of Partitions

7.2.2 Finding SP Partitions

7.3 State Reduction Using Partitions

7.4 Choosing a State Assignment

7.5 Solved Problems

7.6 Exercises

Appendix A

Laboratory Experiments

A.1 Hardware Logic Lab

A.2 WinBreadboard ™ MacBreadboard ™

A.3 Introduction to LogicWorks 4

A.4 Introduction to Altera Max+plusII

A.5 A Set of Logic Design Experiments

A.5.1 Experiments Based on Chapter 2 Material

A.5.2 Experiments Based on Chapter 4 Material

A.5.3 Experiments Based on Chapter 5 Material

A.5.4 Experiments Based on Chapter 6 Material

A.6 Layout of Chips Referenced in the Text and Experiments

Index