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The Compiler Design Handbook: Optimizations & Machine Code Generation
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The Compiler Design Handbook: Optimizations & Machine Code Generation

The Compiler Design Handbook: Optimizations & Machine Code Generation

Ayikudy Srikanth, Priti Shankar

928 pages, parution le 29/11/2002

Résumé

The widespread use of object-oriented languages and Internet security concerns are just the beginning. Add embedded systems, multiple memory banks, highly pipelined units operating in parallel, and a host of other advances and it becomes clear that current and future computer architectures pose immense challenges to compiler designers-challenges that already exceed the capabilities of traditional compilation techniques.

The Compiler Design Handbook: Optimizations and Machine Code Generation is designed to help you meet those challenges. Written by top researchers and designers from around the world, it presents detailed, up-to-date discussions on virtually all aspects of compiler optimizations and code generation. It covers a wide range of advanced topics, focusing on contemporary architectures such as VLIW, superscalar, multiprocessor, and digital signal processing. It also includes detailed presentations that highlight the different techniques required for optimizing programs written in parallel and those written in object-oriented languages. Each chapter is self-contained, treats its topic in depth, and includes a section of future research directions.

Compiler design has always been a highly specialized subject with a fine blend of intricate theory and difficult implementation. Yet compilers play an increasingly vital role in the quest for improved performance. With its careful attention to the most researched, difficult, and widely discussed topics in compiler design, The Compiler Design Handbook offers a unique opportunity for designers and researchers to update their knowledge, refine their skills, and prepare for future innovations.

  • Provides the first up-to-date handbook for advanced compiler optimizations and code generation
  • Focuses on various contemporary architectures, including VLIW, superscalar, and multiprocessor
  • Includes extensive references and a section on future research directions in each chapter
  • Features chapters contributed by leading experts and active researchers in the field

Contents

  1. Dataflow Analysis, Uday P. Khedker
  2. Automatic Generation of Code Optimizers from Formal Specifications, Vineeth Kumar Paleri
  3. Scalar Compiler Optimizations on the SSA Form and the Flow Graph, Y.N. Srikant
  4. Profile-Guided Compiler Optimizations, Rajiv Gupta, Eduard Mehofer, and Youtao Zhang
  5. Shape Analysis and Applications, Reinhard Wilhelm, Thomas Reps, and Mooly Sagiv
  6. Optimizations for Object-Oriented Languages, Andreas Krall, and Nigel Horspool
  7. Data Flow Testing, Rajiv Gupta and Neelam Gupta
  8. Program Slicing, G. B. Mund, D Goswami and Rajib Mall
  9. Debuggers for Programming Languages, Sanjeev Kumar Aggarwal and M Sarath Kumar
  10. Analysis and Parallelizing Transformations, Sanjay Rajopadhye
  11. Compilation for Distributed Memory Architectures, Alok Choudhary and Mahmut Kandemir
  12. Automatic Data Distribution, J. Ramanujam
  13. Register Allocation, K. Gopinath
  14. Architecture Description Languages for Retargetable Compilation, Sharad Malik and Wei Qin
  15. Instruction Selection Using Tree Parsing, Priti Shankar
  16. Retargetable Very Long Instruction Word Compiler Framework for Digital Signal Processors, Sharad Malik and S. Rajagopalan
  17. Instruction Scheduling, R. Govindarajan
  18. Software Pipelining, Vicki H. Allan and Stephen J.Allan
  19. Dynamic Compilation, Evelyn Duesterwald
  20. Compiling Safe Mobile Code, R. Venugopal and Ravindra B. Keskar
  21. Type Systems in Programming Languages, Ramesh Subrahmanyam
  22. Introduction to Operational Semantics, Sanjeeva Prasad and S. Arun Kumar

L'auteur - Ayikudy Srikanth

Ayikudy Srikanth, formerly of Nortel Networks, is Director of Software Engineering at Crossbeam Systems, a company providing enterprises and service providers with high-performance, highly available open platforms designed for the deployment of multiple network services. He is a member of the VRRP working group in the Internet Engineering Task Force (IETF), and co-authored the VRRP over LAN emulation draft. He was the designer as well as manager of the team that implemented VRRP in the Bay Series Routers at Nortel and has two patents related to VRRP extensions.

L'auteur - Priti Shankar

Indian Institute of Science, Bangalore, India

Caractéristiques techniques

  PAPIER
Éditeur(s) CRC Press (Taylor and Francis Group)
Auteur(s) Ayikudy Srikanth, Priti Shankar
Parution 29/11/2002
Nb. de pages 928
Format 18,3 x 26
Couverture Relié
Poids 1749g
Intérieur Noir et Blanc
EAN13 9780849312403
ISBN13 978-0-8493-1240-3

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