Verilog Digital System Design

Zainalabedin Navabi - Collection Electronic Engineering

384 pages, parution le 25/11/2005 (2^eme édition)

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Résumé

LEARN VERILOG DESIGN WITH A MASTER

This rigorous tutorial shows electronics designers and students how to apply Verilog in sophisticated digital systems design, using over a hundred skill-building, fully worked-out, and simulated examples. Completely updated, the second edition covers Verilog 2001, new synthesis standards, testing and testbench development, and the new OVL verification library. You'll find out just what's involved in using Verilog hardware description language (HDL) in digital system design. HDL expert Zain Navabi explains the design process in logical sequence-the way it's done in the real world.

Moving from simple concepts to the more complex, Navabi interprets Verilog constructs related to design stages and design abstractions, including behavioral description, dataflow description, and structure description. With emphasis on the concepts of concurrency and delay in hardware, the text helps you grasp the essence of HDLs. Clear specification of learning objectives at the beginning of each chapter and end-of-chapter problems focus attention on key concepts. If mastery of design with Verilog is the goal, Zain Navabi's Verilog Digital System Design is the tool.

MUST-HAVE CD INCLUDED

Verilog and VHDL simulators
Synthesis tools
Mixed-level logic and Verilog design environment
FPGA design tools and environments from Altera
Related tutorials and standards
All worked examples from the book, including testbench and simulation-run reports for every example
Complete CPU examples with Verilog code and software tools
OVL verification libraries and tutorials

THE BEST VERILOG TUTORIAL-UPDATED

Verilog 2001, step by step in examples and text
OVL verification library
New synthesis standards
New chapter on testbench development and verification
Problem set in each chapter encourages review and test of key concepts
Instructor's manual and lecture slides available for class use

Sommaire

Preface
Digital System Design Automation with Verilog
Register Transfer Level Design with Verilog
Verilog Language Concepts
Combinational Circuit Description
Sequential Circuits in Verilog
Component Test and Verification
Detailed Modelling
RT Level Design and Test
Appendix A: List of Keywords
Appendix B: Frequently Used System Tasks and Functions
Appendix C: Compiler Directives
Appendix D: Verilog Formal Syntax Definition
Appendix E: Verilog Assertion Monitors
Index

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Caractéristiques techniques

	PAPIER
Éditeur(s)	Mc Graw Hill
Auteur(s)	Zainalabedin Navabi
Collection	Electronic Engineering
Parution	25/11/2005
Édition	2^eme édition
Nb. de pages	384
Format	15,5 x 23,5
Couverture	Relié
Poids	721g
Intérieur	Noir et Blanc
EAN13	9780071445641
ISBN13	978-0-07-144564-1