Guide to RISC Processors

for Programmers and Engineers

Sivarama P. Dandamudi

390 pages, parution le 10/06/2005

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Résumé

Recently, there's been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design: Some example RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intel's 64-bit processor Itanium.

This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM and Itanium. Initial chapters explain the differences between the CISC and RISC designs, and one clearly discusses the RISC design principles. Roughly the second half of the book is dedicated to MIPS assembly language programming, thereby enabling readers to grasp the concepts discussed in the first half.

Topics and features:

Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience
Presents material in a manner suitable for self-study, using several examples in each chapter
Assembly language programs permit reader executables using the SPIM simulator
Integrates core concepts to processor designs and their implementations
Supplies extensive programming examples and figures
Each chapter begins with an overview and ends with a summary

Guide to RISC Processors provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as the all the popular modern RISC processors and their assembly language. Professionals and programmers seeking an authoritative and practical overview of RISC processors will find the guide an essential resource, and students in computer architecture and other courses will regard it as an important reference tool.

Written for: Programmers, engineers, and professionals

L'auteur - Sivarama P. Dandamudi

Carleton University, Ottawa, ON, Canada

Sommaire

Part I--OVERVIEW: Introduction
- Processor design issues
- RISC principles
Part II--ARCHITECTURES: MIPS architecture
- SPARC architecture
- PowerPC architecture
- Itanium architecture
- ARM architecture
Part III--MIPS ASSEMBLY LANGUAGE: SPIM simulator and debugger
- Assembly language overview
- Procedures and the stack
- Addressing modes
- Arithmetic instructions
- Conditional execution
- Logical and shift operations
- Recursion
- Floating-point operations
Appendixes: Number Systems
- Character Representation
- MIPS Instruction Set Summary
- Programming Exercises

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Caractéristiques techniques

	PAPIER
Éditeur(s)	Springer
Auteur(s)	Sivarama P. Dandamudi
Parution	10/06/2005
Nb. de pages	390
Format	18 x 24
Couverture	Relié
Poids	875g
Intérieur	Noir et Blanc
EAN13	9780387210179
ISBN13	978-0-387-21017-9