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Design Verification with e
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Design Verification with e

Design Verification with e

Samir Palnitkar

362 pages, parution le 20/10/2003

Résumé

The book presents a logical progression of e-based topics. It starts with the basics, such as functional verification methodologies, e basics and then gradually builds on to bigger examples and eventually reaches advanced topics, such as coverage driven functional verification, re-usable verification components and C/Cplusplus Interface. Thus, the book is useful to e users with varying levels of expertise.

Contents

  • Introduction
    • Overview of functional verification
    • Modeling a verification environment with e
  • e basics
    • Basic e concepts
    • Creating hierarchy with structs and units
    • Constraining Generation
    • Procedural flow control
    • Events and temporal expressions
    • Time consuming methods
    • Checking
    • Coverage
    • Running the simulation
  • Creating a complete verification system with e
    • Verification setup and specification
    • Creating and running the verification environment
  • Avanced verification techniques with e
    • Coverage-driven functional verification
    • Reusable verification components (eVCs)
    • Interfacing with C
  • Appendixes
    • Quick reference guide
    • eTidbits

L'auteur - Samir Palnitkar

Samir Palnitkar is the President of Jambo Systems, Inc., a leading ASIC design and verificationservices company and a Verisity Verification Alliance partner. He previously founded IntegratedIntellectual Property, Inc., an ASIC company that was acquired by Lattice Semiconductor, Inc.,and Obongo, Inc., an e-commerce software firm that was acquired by AOL Time Warner, Inc. Heholds a Bachelor of Technology in Electrical Engineering from the Indian Institute ofTechnology, Kanpur; a Master's in Electrical Engineering from the University of Washington,Seattle; and an MBA degree from San Jose State University, San Jose, California. Heis a recognized authority on e, Verilog HDL, modeling, verification, logic synthesis, andEDA-based methodologies in digital design. He has worked extensively with design andverification on various successful microprocessor, ASIC, and system projects; worked on manye-based projects; and trained hundreds of students on e since 1997.

Caractéristiques techniques

  PAPIER
Éditeur(s) Prentice Hall
Auteur(s) Samir Palnitkar
Parution 20/10/2003
Nb. de pages 362
Format 18 x 24
Couverture Relié
Poids 985g
Intérieur Noir et Blanc
EAN13 9780131413092

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