Higher-Level Harware Synthesis

Richard Sharp - Collection Lecture Notes in Computer Science

195 pages, parution le 03/05/2004

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Résumé

The exponential increase in transistor density on computer chips, supporting Moore's law now for four decades, poses new design challenges to engineers and computer scientists alike. New techniques for managing complexity must be developed if circuits are to take full advantage of the vast numbers of transistors available. This book investigates both the design of high-level languages for hardware description and techniques involved in translating these high-level languages to silicon. The author introduces the first-order functional language SAFL, designed specifically for behavioral hardware description, and describes the implementation of its associated silicon compiler. Finally, the SAFL language is extended with pi-calculus style channels and channel passing and primitives for structural-level circuit description. The semantics of these languages is formalized and results are presented arising from the generation of real hardware exploiting these techniques. This monograph is based on the author's PhD work conducted at the Computer Laboratory of the University of Cambridge, UK, under the supervision of Dr. Alan Mycroft.

Written for:
Researchers and professionals

Sommaire

Introduction
Related Work
The SAFL Language
Soft Scheduling
High-Level Synthesis of SAFL
Analysis and Optimisation of Intermediate Code
Dealing with I/O
Combining Behaviour and Structure
Transformation of SAFL Specifications
Case Study
Conclusions and Further Work

A DES Encryption/Decryption Circuit
B Transformations to Pipeline DES
C A Simple Stack Machine and Instruction Memory

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Caractéristiques techniques

	PAPIER
Éditeur(s)	Springer
Auteur(s)	Richard Sharp
Collection	Lecture Notes in Computer Science
Parution	03/05/2004
Nb. de pages	195
Format	15,5 x 23,5
Couverture	Broché
Poids	330g
Intérieur	Noir et Blanc
EAN13	9783540213062